The present invention relates to analog to digital converters, and more particularly to an analog to digital converter with second order error correction to provide consistent high frequency accuracy.
It is common for analog to digital converter accuracy to degrade at high frequencies. Referring to FIG. 1 consider the typical flash analog to digital comparator cell input. Ideally the comparator senses when the input voltage Vin at terminal V1 matches a reference voltage Vref at terminal V2 of a differential amplifier. However practically the finite emitter current I and circuit capacitances C introduce an input slope, i.e., slew rate, dependent term in the comparator sense points that is a function of the frequency of the input voltage Vin. At high frequencies this results in the noted accuracy degradation. As shown in FIG. 2 for a representative ten-bit ADC at two megahertz the effective number of bits for the ADC is reduced to nine bits, at 20 MHz it is further reduced to eight bits, and at 80 MHz it is reduced even further to five bits.
Therefore what is desired is an analog to digital converter with second order error correction to compensate for the frequency dependent input slope.